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          <dc:title>Microarchitecture and workload-aware error prediction based on artificial intelligence</dc:title>
          <dc:creator>Styliani Tompazi (24169428)</dc:creator>
          <dc:subject>PUREID: 626306223</dc:subject>
          <dc:subject>machine learning</dc:subject>
          <dc:subject>microarchitecture</dc:subject>
          <dc:subject>timing errors</dc:subject>
          <dc:subject>workload</dc:subject>
          <dc:subject>fault injection</dc:subject>
          <dc:subject>neural networks</dc:subject>
          <dc:subject>artificial intelligence</dc:subject>
          <dc:description>This dissertation focusses on modelling the data-dependent dynamic timing behaviour of modern, complex designs, in an effort to assist in evaluating the impact of timing errors early in the design cycle or navigate the selection of more optimistic operating conditions. This thesis investigates in-depth the factors that contribute to timing error manifestation in pipelined architectures and discusses AI-based solutions and improvements.&lt;br&gt;&lt;br&gt;</dc:description>
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